1. Field of the Invention
The present invention relates to semiconductor integrated circuits, and more particularly, to techniques that can be effectively applied to semiconductor integrated circuits including driving circuits with CMOS structure.
2. Description of the Related Art
In general, switching elements of power-conversion bridge-circuits are driven by a high voltage IC (HVIC) in a low-capacity inverter. In general, the high voltage IC includes, for example, a high-side driving circuit, a low-side driving circuit, a level shifter, and a control circuit. The high voltage IC transmits driving signals for turning on and off a gate of a switching element from output terminals according to signals fed from input terminals. In the power-conversion bridge-circuit, the switching elements of high-side circuits which receive signals from the high voltage IC are operated to perform power conversion.
The high-side driving circuit which drives the high-side circuit is a complementary MOS (CMOS) circuit in which a p-channel MOSFET and an n-channel MOSFET as insulated-gate field-effect transistors are connected in a complementary topology. The p-channel MOSFET is disposed in an n-type well region which is provided in an upper part of the p-type semiconductor substrate. The n-channel MOSFET is disposed in a p-type well region which is provided in an upper part of the n-type well region. The high-side driving circuit operates, using a VS-potential as a reference potential and a VB-potential as a power-supply potential, and transmits a driving signal from an output terminal on the basis of a signal received from the level shift circuit. The VB-potential is the highest potential applied to the high voltage IC and is held at a level that is about 15 V higher than the VS-potential by, for example, a bootstrap capacitor in a normal state being not affected by noise. The VS-potential is potential at an output node portion which is a connection point between a high-voltage-side switching element and a low-voltage-side switching element of the power-conversion bridge-circuit and is changed between 0 V and several hundreds of volts during a power conversion process. In some cases, the VS-potential is a negative potential.
In the high voltage IC, various types of noise generated by the operation of the switching elements are likely to be fed. Therefore, improving noise immunity such that an operation error or an operation failure does not occur and ensuring high reliability are important in the design of the HVIC. Suppressing the operation of a parasitic element is necessary in order to improve noise immunity. In particular, suppressing the operation of a parasitic element, which is generated immediately below a high-side circuit formation region, which corresponds to a region in the vicinity of a high-voltage-side switching element driving circuit, in the vertical direction of the substrate, is important. The reason is that the area of the parasitic element provided in the vertical direction of the substrate is large and a large amount of current is likely to flow.
JP 2004-47937 A discloses a technique in which an n-type high-concentration buried region is provided between a p-type semiconductor substrate and an n-type semiconductor layer to suppress the operation of a parasitic p-n-p transistor. WO 2014/058028 A discloses a technique in which a clamping p-channel MOSFET is provided in an n-type well region to suppress the operation of a parasitic p-n-p bipolar transistor due to a negative voltage surge.